1. Field of the Invention
The present invention relates to an apparatus and a method for controlling power management, which is applicable to every apparatus and component able to enter a power saving state.
2. Description of the Related Art
The present invention relates to an apparatus and a method in which a tick which is an performing cycle (or a scheduling cycle) of each task of programs is assigned by an operating system (hereinafter, ‘OS’) scheduler, so that a processor performs the each task during the assigned tick, wherein the apparatus and the method allow a processor to transition to a power saving state if workload given to the processor is less than a predetermined level and to transition to a corresponding power management state as compared operating time of the processor during the tick with resume time information of each power management state.
Hereinafter, related art of the present invention will be described.
In general, a system, a processor or a device is transitioned to a predetermined power management state if workloads given to the system, the processor or the device are less than a predetermined level.
For example, OS allows the processor (CPU) to enter a power saving state if no workload is given to the processor and to resume from the power saving state if the workload give to the processor is increased. Generally, the processor in hibernation state erases clock and cache data, so that resuming from the hibernation state takes a long time and more workload for resuming from the hibernation state is given to the processor. Accordingly, power consumption is increased.